DocumentCode :
653884
Title :
Fast multi-match packet classification using index bits
Author :
Eslamdoost, M. ; Ahmadi, Mahdi ; Ahmadi, Amin ; Gomar, Shaghayegh
Author_Institution :
Electr. Eng., Razi Univ., Kermanshah, Iran
fYear :
2013
fDate :
Oct. 31 2013-Nov. 1 2013
Firstpage :
153
Lastpage :
160
Abstract :
High performance packet classification is one of the most important requirements for next generation network services. Even though many multi-dimensional classification algorithms have been proposed, most of them are precluded from commercial tools due to their complexity or high memory requirements. This paper, presents a new efficient packet classification method based on a 5-field search algorithm. Our new algorithm uses only 75 KB of inexpensive external SRAM. The main advantage of proposed method is simplicity and high speed which it made it attractive for high speed application such as IPV6. The implementation results show that our architecture can store 10K real-life 5-tuple rules in on-chip memory of a single FPGA and sustain 40 Gbps throughput for packets with minimum size of 40 bytes.
Keywords :
Internet; SRAM chips; next generation networks; pattern classification; search problems; 5-field search algorithm; IPV6; Internet traffic; bit rate 40 Gbit/s; fast multimatch packet classification; high performance packet classification; index bits; inexpensive external SRAM; multidimensional classification algorithms; next generation network services; on-chip memory; single FPGA; Field programmable gate arrays; Hardware; Indexes; Sorting; Field Programmable Gate Array (FPGA); INDEX-Bits; Packet Classification;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer and Knowledge Engineering (ICCKE), 2013 3th International eConference on
Conference_Location :
Mashhad
Print_ISBN :
978-1-4799-2092-1
Type :
conf
DOI :
10.1109/ICCKE.2013.6682820
Filename :
6682820
Link To Document :
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