Layout-type dependence on ESD/LU reliabilities for LVTnSCR devices

This paper aimed at the study of layout dependence on ESD/LU reliabilities in the 0.35um 3.3V low-voltage triggered silicon-controlled-rectifier (LVTSCR) DUTs. In this work, the parameter of channel L in an nMOS, the parameter S of an SCR are varied to study the influence on trigger voltage (V_t1), holding voltage (V_h) and secondary breakdown current (I_t2). Eventually, it can be concluded that the layout illustration of type-2 has a higher I_t2 than that of type-1, i.e., the ratio of (I_t2)_type-2/(I_t2)_type-1 > 1.3 among all the LVTnSCRs. Meanwhile, the holding voltages of SCR devices are latch-up (LU) free while operated at 3.3V. Therefore, the type-2 layouts of SCR device are so excellent structure in the ESD/LU reliability considerations for power management applications.