A 60 GHz wide band direct downconversion receiver in 40 nm CMOS

A 60 GHz receiver front-end with 6 GHz RF bandwidth and 4 GHz baseband bandwidth is presented. The chip consists of an LNA and quadrature direct downconversion mixers, directly connected to a high impedant digital baseband. An on-chip poly-phase filter is used to generate the necessary quadrature LO signals from an external reference. A fully differential architecture is used to alleviate the influences of parasitics and avoid common-mode stability problems. A test chip was fabricated in a 1P10M 40nm CMOS process. A noise figure of 10.8 dB and input P_1dB of -9dBm were measured. The front-end has a power consumption of 80mWfrom a 1.1V supply.