Performance metrics for thermoelectric energy harvesting studied using a novel planar 65 nm silicon CMOS-based thermopile

We present a study of thermoelectric energy harvesting with nano-sized thermopiles (nTE) in a planar 65 nm silicon CMOS process. These devices generated power from a 5C temperature difference at a density comparable to commercially available thermoelectric generators, following a metric used in the research literature [1]. By analyzing a thermoelectric harvesting system, we explore the impact of additional performance metrics such as heat source/sink thermal impedance, available heat flow density, and voltage stacking, providing a more comprehensive set of criteria for evaluating the suitability of harvesting technology.