Design and error analysis of a OTA for high speed pipeline ADC

This work designs and simulates a high-speed low-power operational transconductance amplifier(OTA), which is used in a 100Msps, 8 bit pipeline ADC with 1.5 bit per stage. Primary objective of the design has been to analyze how the error of OTA (offset voltage and gain error) impact to the performance of ADC. The OTA use the circuit of fully differential telescopic cascode to get high gain and low power, it achieves 45dB voltage gain and the average offset voltage of this OTA is only 512.1uV.The ADC achieves 0.7LSB DNL and 0.9LSB INL with low power consumption from 1.8V supply.