Title :
On the Generation of Compact Deterministic Test Sets for BIST Ready Designs
Author :
Kumar, Ajit ; Rajski, J. ; Reddy, S.M. ; Rinderknecht, Thomas
Author_Institution :
Dept. of ECE, Univ. of Iowa, Iowa City, IA, USA
Abstract :
In this work we consider ATPG methods tailored to BIST ready designs to improve compression of external tests for such designs. Proposed ATPG reduces external test set sizes and test data volumes by 24% in comparison to that obtained by a state of the art commercial ATPG for BIST ready designs.
Keywords :
automatic test pattern generation; built-in self test; ATPG; BIST; automatic test pattern generation; built-in self test; test sets generation; Automatic test pattern generation; Built-in self-test; Circuit faults; Controllability; Logic gates; Random access memory; Test data compression; ATPG; BIST Ready Design; Test Compression;
Conference_Titel :
Test Symposium (ATS), 2013 22nd Asian
Conference_Location :
Jiaosi Township
DOI :
10.1109/ATS.2013.45
