Title :
A fully integrated SAR ADC using digital correction technique for triple-mode mobile transceiver
Author :
Nakane, Hideyuki ; Ujiie, Ryuichi ; Oshima, Toru ; Yamamoto, Takayuki ; Kimura, K. ; Okuda, Yukihiro ; Tsuiji, Kosuke ; Matsuura, T.
Author_Institution :
Renesas Electron. Corp., Kawasaki, Japan
Abstract :
This paper presents a fully integrated SAR ADC for GSM/WCDMA/LTE triple-mode transceiver (RFIC) with novel non-binary DAC structure and digital correction techniques. All blocks are implemented in a single chip with 0.044mm2/0.066mm2 for analog/logic. Reconfigurable structure is used for multi-mode operation by adjusting ADC speed and noise, where SNDR of 67.0dB in GSM and 58.2dB in WCDMA/LTE are achieved at the sampling frequencies of 52MS/s and 80MS/s, respectively.
Keywords :
Long Term Evolution; analogue-digital conversion; cellular radio; code division multiple access; digital-analogue conversion; radio transceivers; radiofrequency integrated circuits; GSM transceiver; LTE transceiver; RFIC; WCDMA transceiver; digital correction technique; fully integrated SAR ADC; multimode operation; nonbinary DAC structure; reconfigurable structure; successive approximation register; triple mode mobile transceiver; triple mode transceiver; Calibration; Capacitance; Capacitors; GSM; Multiaccess communication; Noise; Spread spectrum communication; RF transceiver; SAR ADC; charge-sharing; digital correction; non-binary conversion;
Conference_Titel :
Solid-State Circuits Conference (A-SSCC), 2013 IEEE Asian
Conference_Location :
Singapore
Print_ISBN :
978-1-4799-0277-4
DOI :
10.1109/ASSCC.2013.6690985
