DocumentCode
659006
Title
Sensitization criterion for threshold logic circuits and its application
Author
Chen-Kuan Tsai ; Chun-Yao Wang ; Ching-Yi Huang ; Yung-Chih Chen
Author_Institution
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear
2013
fDate
18-21 Nov. 2013
Firstpage
226
Lastpage
233
Abstract
Threshold logic has been known as an alternative representation of Boolean logic due to its compactness characteristic. Recently, the developments in advanced nanotechnologies have also promised efficient implementations of threshold logic gates. Thus, many synthesis methodologies for threshold logic circuits have been proposed. Since threshold logic has a different mechanism in functional evaluation compared to the traditional Boolean logic, a threshold logic gate can represent a more complex function. As a result, the sensitization criterion in threshold logic circuits is also different. In this work, we propose a sensitization criterion for threshold logic circuits, and show its application to the static timing analysis problem. The experimental results show the accuracy of the proposed criterion.
Keywords
Boolean functions; logic gates; nanoelectronics; threshold logic; Boolean logic; compactness characteristic; functional evaluation; nanotechnologies; sensitization criterion; static timing analysis problem; synthesis methodologies; threshold logic circuits; threshold logic gates; Algorithm design and analysis; Delays; Logic circuits; Logic functions; Logic gates;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design (ICCAD), 2013 IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Type
conf
DOI
10.1109/ICCAD.2013.6691123
Filename
6691123
Link To Document