• DocumentCode
    661550
  • Title

    Ultra-low specific on-resistance SOI high voltage trench LDMOS with dielectric field enhancement based on ENBULF concept

  • Author

    Wentong Zhang ; Ming Qiao ; Lijuan Wu ; Ke Ye ; Zhuo Wang ; Zhigang Wang ; Xiaorong Luo ; Sen Zhang ; Wei Su ; Bo Zhang ; Zhaoji Li

  • Author_Institution
    State Key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Chengdu, China
  • fYear
    2013
  • fDate
    26-30 May 2013
  • Firstpage
    329
  • Lastpage
    332
  • Abstract
    An ultra-low specific on-resistance (Ron, sp) high voltage trench SOI LDMOS based on the enhanced bulk field (ENBULF) concept is proposed. The key feature of this new device is heavily doped N/P pillars parallel to the trench oxide layer. The bulk electric field of the trench LDMOS is enhanced both in the dielectric and the silicon layer by using the N/P pillars. Firstly, the highly doped N/P pillars introduce two new electric field peaks in the bulk of the drift region, which enhances the bulk electric fields both under the drain and source. Secondly, the additional electric field of the trench oxide layer is produced by N/P pillars, leading to a shrink of the drift area. Thirdly, the enhanced dielectric layer field (ENDIF) effect of the BOX layer occurs self-adaptively with different thicknesses of the BOX layer. Combining the trench and SJ technologies, the cell pitch is reduced and the optimized doping concentration of the drift region is increased. The Ron,sp is therefore reduced efficiently. The 2-D analytical model of the ENBULF LDMOS is developed to guide the design of the novel device. Based on the model and the simulation, the ENBULF LDMOS exhibits a offstate BV of 684 V and a Ron, sp of 48.5 mΩ·cm2. The new device breaks through the silicon limit in a wide applied voltage levels.
  • Keywords
    MOSFET; electric fields; elemental semiconductors; semiconductor device models; silicon; silicon-on-insulator; BOX layer; ENBULF concept; ENDIF effect; N/P pillars; analytical model; bulk electric fields; buried oxide layer; dielectric field enhancement; dielectric layer field enhancement; doping concentration; drift region; enhanced bulk field; high voltage trench SOI LDMOS; silicon layer; silicon limit; silicon-on-insulator; trench oxide layer; voltage 684 V; Analytical models; Dielectrics; Doping; Electric breakdown; Electric fields; Electric potential; Silicon; Ron; dielectric field enhancement; enhanced bulk field (ENBULF); silicon limit; sp; trench SOI LDMOS;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Semiconductor Devices and ICs (ISPSD), 2013 25th International Symposium on
  • Conference_Location
    Kanazawa
  • ISSN
    1943-653X
  • Print_ISBN
    978-1-4673-5134-8
  • Type

    conf

  • DOI
    10.1109/ISPSD.2013.6694415
  • Filename
    6694415