• DocumentCode
    661557
  • Title

    BCD8sP: An advanced 0.16 μm technology platform with state of the art power devices

  • Author

    Roggero, R. ; Croce, G. ; Gattari, P. ; Castellana, E. ; Molfese, A. ; Marchesi, G. ; Atzeni, L. ; Buran, C. ; Paleari, A. ; Ballarin, G. ; Manzini, S. ; Alagi, F. ; Pizzo, G.

  • Author_Institution
    Tecnology R&D, STMicroelectron., Agrate Brianza, Italy
  • fYear
    2013
  • fDate
    26-30 May 2013
  • Firstpage
    361
  • Lastpage
    364
  • Abstract
    Advanced 0.16 μm BCD technology platform offering dense logic transistors (1.8 V-5 V CMOS) and high performance analog features has been developed. Thanks to dedicated field plate optimization, body and drain engineering, state of the art power devices (8 V to 42 V rated) have been obtained ensuring large Safe Operating Areas with best RONXAREA-BVDSS tradeoff.
  • Keywords
    BIMOS integrated circuits; circuit optimisation; power integrated circuits; BCD technology platform; BCD8sP; CMOS technology; RONXAREA-BVDSS tradeoff; body optimization; dense logic transistors; drain optimization; field plate optimization; power devices; safe operating area; size 0.16 mum; voltage 1.8 V to 5 V; voltage 8 V to 42 V; CMOS integrated circuits; CMOS technology; Electric fields; MOS devices; Optimization; Performance evaluation; Reliability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Semiconductor Devices and ICs (ISPSD), 2013 25th International Symposium on
  • Conference_Location
    Kanazawa
  • ISSN
    1943-653X
  • Print_ISBN
    978-1-4673-5134-8
  • Type

    conf

  • DOI
    10.1109/ISPSD.2013.6694422
  • Filename
    6694422
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=661557