Title :
Sub-micron junction termination for 1200V class devices toward CMOS process compatibility
Author :
Seto, Kota ; Takaishi, Junpei ; Imaki, Hironori ; Tanaka, Masahiro ; Tsukuda, Masanori ; Omura, Ichiro
Author_Institution :
Kyushu Inst. of Technol., Kitakyushu, Japan
Abstract :
This study shows, for the first time, possibility of very shallow junction termination in submicron scale. The 2D-TCAD simulations unveil even 0.2μm junction depth structures are capable of blocking 1200V and usability for power devices with more than two hundreds of guard rings. Very shallow structure has robustness against diffusion depth deviation by special guard ring arrangement.
Keywords :
CMOS integrated circuits; insulated gate bipolar transistors; 2D-TCAD simulations; CMOS process compatibility; IGBT; diffusion depth deviation; guard ring arrangement; power devices; submicron junction termination; voltage 1200 V; Electric fields; Insulated gate bipolar transistors; Junctions; Robustness; Shape; Structural rings;
Conference_Titel :
Power Semiconductor Devices and ICs (ISPSD), 2013 25th International Symposium on
Conference_Location :
Kanazawa
Print_ISBN :
978-1-4673-5134-8
DOI :
10.1109/ISPSD.2013.6694441
