A comparator with reduced regeneration time for continuous-time delta-sigma modulator

Author

Hi Yuen Song ; So Young Kang ; Dongmin Kang ; Hyunseok Choi ; Inn Yeal Oh ; Chul Soon Park

Author_Institution

Dept. of Electr. Eng., KAIST, Daejeon, South Korea

fYear

2013

fDate

5-8 Nov. 2013

Firstpage

760

Lastpage

762

Abstract

A design of a comparator with reduced regeneration time and down scaling voltage for continuous-time delta-sigma modulators (CT DSM) was proposed. It has voltage scaling down to 0.65 V, and gives worst case delay under 10%Ts (i.e. 125 ps for 800 MHz sampling frequency) at 1.2 V supply voltage. A 3^rd order low pass CT DSM employing the proposed comparator achieves 50.76 dB of SNDR and 3.2 MHz bandwidth, which are 5.2 dB higher and 3.2 times wider than those of a 3^rd order low pass CT DSM employing the reference comparator, respectively.

Keywords

UHF circuits; comparators (circuits); delta-sigma modulation; network synthesis; reference circuits; 3^rd order low pass CT DSM; bandwidth 3.2 MHz; continuous-time delta-sigma modulator; down scaling voltage; frequency 800 MHz; noise figure 5.2 dB; noise figure 50.76 dB; reduced regeneration time; reference comparator; time 125 ps; voltage 0.65 V; voltage 1.2 V; Bandwidth; Clocks; Conference proceedings; Delays; Modulation; Noise; Transistors; ΔμADC; CT DSM; comparator; continuous-time; delay; delta-sigma modulator; excess loop delay; regeneration time;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference Proceedings (APMC), 2013 Asia-Pacific

Conference_Location

Seoul

Type

conf

DOI

10.1109/APMC.2013.6694922

Filename

6694922