Power-Hardware-in-the-loop simulation of a D-STATCOM equipped MV network interfaced to an actual PV inverter

Power-Hardware-in-the-Loop (PHIL) simulation is a promising method for studying the interaction of various complex components in current and future electricity grids. This paper firstly examines the applicability of PHIL simulation to Fault-Ride-Through tests. A test setup is implemented with a hardware PV inverter as the Hardware Under Test (HUT). Furthermore, the PHIL method is employed for testing and validating the capability of a D-STATCOM to compensate voltage dips. An average model of a D-STATCOM is developed in the RTDS^® and its influence on the operation of the hardware PV inverter is investigated.