DocumentCode :
662834
Title :
Real-time implementation of an LUT-based image warping system
Author :
Jung Rae Ryoo ; Eun Sang Lee ; Hyun Keun Park
Author_Institution :
Dept. of Electr. & Inf. Eng., SeoulTech, Seoul, South Korea
fYear :
2013
fDate :
24-26 Oct. 2013
Firstpage :
1
Lastpage :
4
Abstract :
Image warping is a spatial transformation distorting an original image, and an elementary operation of image warping is moving pixel data to another position. Millions of iterations of the simple operation is adequate to be implemented using digital hardware better than software running on a CPU, and parallel architecture enables real-time processing. In this paper, a hardware architecture for real-time image warping using look-up table(LUT) is presented. An overall hardware architecture including buffer memories is explained. Finally, the hardware architecture is implemented using FPGA, and experimental results are presented.
Keywords :
distortion; field programmable gate arrays; image processing; parallel architectures; real-time systems; table lookup; CPU; FPGA; LUT-based image warping system; look-up table; parallel architecture; real-time implementation; real-time processing; spatial transformation distortion; Adders; CMOS integrated circuits; Hardware; Manufacturing processes; Radio access networks; SDRAM; FPGA; Image warping; LUT; Real-time;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Robotics (ISR), 2013 44th International Symposium on
Conference_Location :
Seoul
Type :
conf
DOI :
10.1109/ISR.2013.6695730
Filename :
6695730
Link To Document :
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