DocumentCode :
663097
Title :
Chip-scale packaging for bioelectronic implants
Author :
Weiland, James D. ; Kimock, Fred M. ; Yehoda, Joseph E. ; Gill, Eberhard ; Mclntosh, Ben P. ; Nasiatka, Patrick J. ; Tanguay, A.R.
Author_Institution :
Dept. of Ophthalmology, Univ. of Southern California, Los Angeles, CA, USA
fYear :
2013
fDate :
6-8 Nov. 2013
Firstpage :
931
Lastpage :
936
Abstract :
Next generation miniaturized bioelectronic implants will require improved hermetic packaging technology to achieve the system requirements for treating complex neurological conditions. We describe herein three key advances towards enabling chip-scale packaging for bioelectronic implants. First, we demonstrate multilayer, multi-material films that have improved barrier properties to contaminating ions and can be deposited conformally on three-dimensional structures. Second, we characterize integrated sensors capable of detecting contaminants, to serve both as tests of deposited coating hermeticity and as an early warning system to predict implant failure. Third, a high-density hermetic feedthrough is described that will enable long-term deployment of state-of-the-art neural interface arrays. Collectively, this work represents a significant advance in packaging technologies for medical implants.
Keywords :
bioelectric phenomena; chip scale packaging; prosthetics; 3D structures; chip scale packaging; complex neurological conditions; contaminating ions; deposited coating hermeticity; hermetic packaging technology; high density hermetic feedthrough; implant failure; integrated sensors; miniaturized bioelectronic implants; multilayer films; multimaterial films; Coatings; Corrosion; Films; Implants; Mobile communication; Nonhomogeneous media; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Engineering (NER), 2013 6th International IEEE/EMBS Conference on
Conference_Location :
San Diego, CA
ISSN :
1948-3546
Type :
conf
DOI :
10.1109/NER.2013.6696088
Filename :
6696088
Link To Document :
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