Title :
Hardware architecture for on-chip unsupervised online neural spike sorting
Author :
Saeed, Maryam ; Kamboh, Awais Mehmood
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Nat. Univ. of Sci. & Technol., Islamabad, Pakistan
Abstract :
Microelectrode arrays can acquire neural signals in parallel from multiple channels. Spike sorting has emerged as one of the most significant challenges in multichannel systems. An ideal spike sorting system must be implantable, unsupervised, online and scalable to hundreds of channels. This paper proposes a novel hardware architecture for on-chip and unsupervised neural spike sorting with Teager Energy Operator detection, Zero-Crossing Features and an online clustering algorithm, MCK Classifier, which is a modification of the standard K-Means. The reported classifier gives an average detection-classification accuracy of 82% at typical SNR of 7dB, which is within 2% of the standard K-Means classifier.
Keywords :
biomedical electrodes; lab-on-a-chip; medical signal detection; microelectrodes; neurophysiology; pattern clustering; prosthetics; signal classification; MCK classifier; SNR; Teager Energy Operator detection; Zero-Crossing Features; average detection-classification accuracy; hardware architecture; ideal spike sorting system; implantable channel; microelectrode arrays; multichannel systems; multiple channels; neural signal; noise figure 7 dB; on-chip unsupervised online neural spike sorting; online channel; online clustering algorithm; standard K-Means classifier; unsupervised channel; unsupervised neural spike sorting; Accuracy; Classification algorithms; Complexity theory; Computer architecture; Feature extraction; Sorting; Standards;
Conference_Titel :
Neural Engineering (NER), 2013 6th International IEEE/EMBS Conference on
Conference_Location :
San Diego, CA
DOI :
10.1109/NER.2013.6696184