DocumentCode
663277
Title
Software hardware co-simulation and co-verification in safety critical system design
Author
Jin Shi ; Weichao Liu ; Ming Jiang ; Huijun Che ; Lei Chen
Author_Institution
Res. Inst. of Gen. Technol., Beijing Nat. Railway Res. & Design Inst. of Signal & Commun. Co., Ltd., Beijing, China
fYear
2013
fDate
Aug. 30 2013-Sept. 1 2013
Firstpage
71
Lastpage
74
Abstract
This paper introduces a novel software and hardware co-design flow using a co-simulator and a co-verifier platform. In the new design platform, different hardware failures can be injected automatically to test the software protection on potential unsafe behavior of the hardware. The structure of the system is introduced in part II of this paper. In part III&IV, we take a simple circuit as an example to show how we setup the components´ model and how our simulation system works. And at last, we make a conclusion on the system, also the problems and challenges we are facing.
Keywords
hardware-software codesign; program testing; program verification; safety-critical software; component model; cosimulator platform; coverifier platform; hardware failures; safety critical system design; software hardware codesign flow; software hardware cosimulation; software hardware coverification; software protection; Computational modeling; Emulation; Hardware; Integrated circuit modeling; Resistance; Safety; Software; Co-Simulation; Co-verification; SPICE; fail-safe;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Rail Transportation (ICIRT), 2013 IEEE International Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4673-5278-9
Type
conf
DOI
10.1109/ICIRT.2013.6696270
Filename
6696270
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