Title :
A 60 GHz low noise amplifier with built-in linearizer
Author :
Chun-An Hsieh ; Yu-Hsuan Lin ; Yuan-Hung Hsiao ; Huei Wang
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
A 57 to 66 GHz low noise amplifier (LNA) with built-in linearizer using 65-nm CMOS technology is presented in this paper. The source-sensed derivative superposition technique is applied to improve the linearity of the LNA at high frequency. The measurement results show that linearized LNA achieves 24 dB gain and 4.5 dB noise figure in the band of interest. Based on the proposed methodology, the improvement of IM3 is 14 dB at 60 GHz. This high linearity LNA is suitable for high data rate transmission application.
Keywords :
CMOS analogue integrated circuits; field effect MIMIC; low noise amplifiers; millimetre wave amplifiers; CMOS technology; LNA; built-in linearizer; frequency 57 GHz to 66 GHz; gain 24 dB; low noise amplifier; noise figure 4.5 dB; size 65 nm; source-sensed derivative superposition; CMOS integrated circuits; CMOS technology; Gain; Linearity; Low-noise amplifiers; Microwave amplifiers; Noise measurement; CMOS; high linearity; low noise amplifier (LNA); monolithic microwave integrated circuit (MMIC);
Conference_Titel :
Microwave Symposium Digest (IMS), 2013 IEEE MTT-S International
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4673-6177-4
DOI :
10.1109/MWSYM.2013.6697369
