DocumentCode
664494
Title
A 11% PAE, 15.8-dBm two-stage 90-GHz stacked-FET power amplifier in 45-nm SOI CMOS
Author
Agah, A. ; Jayamon, J. ; Asbeck, P. ; Buckwalter, J. ; Larson, Lawrence
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of California, San Diego, La Jolla, CA, USA
fYear
2013
fDate
2-7 June 2013
Firstpage
1
Lastpage
3
Abstract
A two-stage 90-GHz stacked-FET power amplifier is implemented in 45-nm SOI CMOS. Dual supply operation supports high gain, power and efficiency in the two-stage design. The amplifier exhibits greater than 15.8 dBm saturated output power with 10 dB peak power gain and achieves a record peak PAE of 11%. The PAE remains above 8% from 86 to 94 GHz. It occupies 0.05 mm2 excluding pads.
Keywords
CMOS analogue integrated circuits; field effect MIMIC; field effect transistors; millimetre wave power amplifiers; silicon-on-insulator; SOI CMOS; dual supply operation; efficiency 11 percent; frequency 90 GHz; power amplifier; power gain; size 45 nm; two-stage stacked-FET; Bandwidth; CMOS integrated circuits; CMOS technology; Field effect transistors; Gain; Power amplifiers; Power generation; CMOS SOI; inter-stage matching; millimeter-wave; power amplifier; stacked PAs; two-stage PA;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest (IMS), 2013 IEEE MTT-S International
Conference_Location
Seattle, WA
ISSN
0149-645X
Print_ISBN
978-1-4673-6177-4
Type
conf
DOI
10.1109/MWSYM.2013.6697504
Filename
6697504
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