Implementation of super-resolution scaler for Full HD and 4K video

The hardware implementation of a sophisticated scaling algorithm for `super-resolution\´ is described, which can scale up from a given lower-resolution image to a high-resolution image with more accurate depiction of edges and details than those of the conventional interpolation algorithms. Specifically, the devised algorithm can enlarge a given image to arbitrary sizes without "jaggy" artifacts or blurring characteristics incurred in the conventional methods. The scaling process is executed through the following four steps; 1) calculating edge orientation, 2) calculating average edge orientation, 3) edge pattern detection, and 4) interpolation; which are pipelined to achieve efficient hardware implementation. Experimental results are shown in terms of the SSIM (Structural SIMilarity) index, to reveal the attainability of much improved image quality in comparison with conventional interpolation and super-resolution algorithms. In addition, FPGA implementation results are also shown to demonstrate that the devised scaler can process Full HD and 4K video frames in realtime.