Title :
Smart trip logic for Smart Grids to block distance relay maloperation — Implementation and validation
Author :
Venkatesh, C. ; Swarup, K. Shanti ; Prasath, S. Vishnu
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol. Madras, Chennai, India
Abstract :
Zone 1 reach setting of a distance relay depend upon many factors, such as, dc offset in current signals, loading effect, fault resistance in the presence of in-feed from remote end and also capacitive voltage transformer (CVT) transients. All these factors are taken care of except for CVT transients, which is dealt either by reducing zone 1 reach or by providing a fixed time delay in today´s intelligent electronic devices (IED). This paper proposes a new and simple logic to prevent numerical distance relay mal-operation by zone 1 element due to CVT transients without sacrificing zone 1 reach. This is achieved by providing adaptive time delay by actually monitoring the CVT transients in time domain. The proposed logic is validated in real time by incorporating the proposed logic along with positive sequence polarized distance relay model in field programmable gate array (FPGA).
Keywords :
field programmable gate arrays; potential transformers; relay protection; smart power grids; time-domain analysis; transient analysis; CVT transient; DC offset; FPGA; IED; adaptive time delay; capacitive voltage transformer transient; current signals; fault resistance; field programmable gate array; fixed time delay; intelligent electronic devices; loading effect; numerical distance relay mal-operation; positive sequence polarized distance relay model; smart grids; smart trip logic; time domain; Delay effects; Field programmable gate arrays; Impedance; Integrated circuit modeling; Protective relaying; Transient analysis;
Conference_Titel :
Innovative Smart Grid Technologies - Asia (ISGT Asia), 2013 IEEE
Conference_Location :
Bangalore
Print_ISBN :
978-1-4799-1346-6
DOI :
10.1109/ISGT-Asia.2013.6698728