Phase detection based data prefetching for utilizing memory bandwidth of 3D integrated circuits

Three-dimensional integrated circuits (3D ICs) technology increases the memory bandwidth dramatically by stacking memory directly on the top of a processor. This technology can overcome the memory wall caused by the long access latency of off-chip memory in a conventional 2D memory system. The data prefetching mechanism is one of the promising approaches due to reducing the prefetching burden from the fast and massive memory bandwidth of 3D ICs technology. In the 3D IC technology, the controlling of prefetch operation can be effective approach more than improving the prefetching accuracy. Therefore, this paper proposed a data prefetching mechanism based on the detection of effective phase for data prefetch. Performance revaluation results show that the proposed mechanism with 512KB L2 cache can achieve the performance improvement by about 14% and 3% more than a conventional L2 cache having 512KB and 4MB capacity, respectively.