• DocumentCode
    668006
  • Title

    Vertically integrated processor and memory module design for vector supercomputers

  • Author

    Egawa, R. ; Sato, Mitsuhisa ; Tada, Jubee ; Kobayashi, Hideo

  • Author_Institution
    Cyberscinece Center, Tohoku Univ., Sendai, Japan
  • fYear
    2013
  • fDate
    2-4 Oct. 2013
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    To overcome the memory and power wall problems on a high performance microprocessor for supercomputer systems, the reduction in memory access latencies and its power consumptions is urgently required. Recently, a 2.5D integration technology, which can integrate multiple chips on a silicon die by using vertical interconnects, are expected as key technologies to overcome these problems. Under this situation, this paper explores the design space of a processor and memory module for vector supercomputers using a vertical integration technology. In this study, both a processor and a memory of vector supercomputers are integrated in one silicon die as a single module, and its performance and power are evaluated by leading scientific applications. The evaluation results demonstrated that the 2.5D integration reduces the energy consumption by 83% compared to the conventional PCB implementation.
  • Keywords
    elemental semiconductors; integrated circuit design; integrated circuit interconnections; integrated memory circuits; mainframes; microprocessor chips; silicon; three-dimensional integrated circuits; 2.5D integration technology; design space; memory access latency; memory module design; vector supercomputer systems; vertical interconnects; vertically integrated processor; Bandwidth; Energy consumption; Memory management; Power demand; Silicon; Supercomputers; Vectors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    3D Systems Integration Conference (3DIC), 2013 IEEE International
  • Conference_Location
    San Francisco, CA
  • Type

    conf

  • DOI
    10.1109/3DIC.2013.6702377
  • Filename
    6702377