• DocumentCode
    668092
  • Title

    List Scheduling in Embedded Systems under Memory Constraints

  • Author

    Arras, Paul-Antoine ; Fuin, D. ; Jeannot, Emmanuel ; Stoutchinin, Arthur ; Thibault, Samuel

  • Author_Institution
    Inria Bordeaux Sud-Ouest, Talence, France
  • fYear
    2013
  • fDate
    23-26 Oct. 2013
  • Firstpage
    152
  • Lastpage
    159
  • Abstract
    Video decoding and image processing in embedded systems are subject to strong resource constraints, particularly in terms of memory. List-scheduling heuristics with static priorities (HEFT, SDC, etc.) being the often-cited solutions due to both their good performance and their low complexity, we propose a method aimed at introducing the notion of memory into them. Moreover, we show that through appropriate adjustment of task priorities and judicious resort to insertion-based policy, speedups up to 20% can be achieved. Lastly, we show that our technique allows to prevent deadlock and to substantially reduce the required memory footprint compared to classic list-scheduling heuristics.
  • Keywords
    embedded systems; resource allocation; scheduling; storage management; video coding; embedded systems; image processing; insertion-based policy; list-scheduling heuristics; memory constraints; memory footprint; resource constraints; static priorities; task priorities; video decoding; Computational modeling; Embedded systems; Memory management; Processor scheduling; Schedules; System recovery; System-on-chip; Task graphs; memory; scheduling; system on chip; video decoding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture and High Performance Computing (SBAC-PAD), 2013 25th International Symposium on
  • Conference_Location
    Porto de Galinhas
  • Print_ISBN
    978-1-4799-2927-6
  • Type

    conf

  • DOI
    10.1109/SBAC-PAD.2013.22
  • Filename
    6702592