Title :
Variation-Tolerant and Disturbance-Free Sensing Circuit for Deep Nanometer STT-MRAM
Author :
Wang Kang ; Zheng Li ; Klein, Jacques-Olivier ; Yuanqing Chen ; Youguang Zhang ; Ravelosona, Dafine ; Chappert, Claude ; Weisheng Zhao
Author_Institution :
Dept. of Electron. & Inf. Eng., Beihang Univ., Beijing, China
Abstract :
This paper presents a high reliability sensing circuit for the deep nanometer spin-transfer torque magnetic random-access memory (STT-MRAM). This sensing circuit, using a triple-stage sensing operation and source follower charge transfer amplification, is able to tolerate mostly the process, voltage, and temperature variations, thus improving greatly the sensing margin. Meanwhile, it clamps the bit-line voltage to a predefined small bias voltage to avoid any read disturbance. With the STMicroelectronics CMOS 40-nm design kit and a precise STT-MTJ compact model, Monte-Carlo simulations have been performed to evaluate its sensing reliability performance.
Keywords :
CMOS memory circuits; MRAM devices; integrated circuit design; integrated circuit reliability; nanoelectronics; Monte-Carlo simulations; STMicroelectronics CMOS design kit; deep nanometer STT-MRAM; deep nanometer spin-transfer torque magnetic random-access memory; disturbance-free sensing circuit; high reliability sensing circuit; precise STT-MTJ compact model; predefined small bias voltage; process-voltage and temperature variations; sensing margin; sensing reliability performance; size 40 nm; source follower charge transfer amplification; triple-stage sensing operation; variation-tolerant circuit; CMOS integrated circuits; Capacitors; Electric potential; Integrated circuit reliability; Magnetic tunneling; Sensors; (PVT) variations; STT-MRAM; read disturbance (RD); sensing circuit; sensing margin (SM);
Journal_Title :
Nanotechnology, IEEE Transactions on
DOI :
10.1109/TNANO.2014.2357054