DocumentCode
668820
Title
Research and implementation of algorithms for improving surveillance video quality based on FPGA
Author
Zhiwei Tang ; Zichuan Li
Author_Institution
Sch. of Mechatron. Eng. & Autom., Shanghai Univ., Shanghai, China
fYear
2013
fDate
20-22 Nov. 2013
Firstpage
495
Lastpage
497
Abstract
In this paper, median filter algorithm and motion vector compensation algorithm is researched. We design and implement the algorithms on the FPGA board in detail. According to the tests and experiments, we verify the practicability of the algorithms on FPGA and video surveillance system. The algorithms will effectively increase the efficiency of late video signal processing and help the application of video enhance.
Keywords
field programmable gate arrays; median filters; motion compensation; video signal processing; video surveillance; FPGA board; late video signal processing; median filter algorithm; motion vector compensation algorithm; video surveillance system; Algorithm design and analysis; Field programmable gate arrays; Filtering algorithms; Quality assessment; Signal processing algorithms; Vectors; Video recording; FPGA; median filter; motion vector compensation; surveillance video quality;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, Communications and Networks (CECNet), 2013 3rd International Conference on
Conference_Location
Xianning
Print_ISBN
978-1-4799-2859-0
Type
conf
DOI
10.1109/CECNet.2013.6703378
Filename
6703378
Link To Document