In-depth analysis of power noise coupling between core and periphery power rails

Core and periphery digital blocks often use the same voltage level. Due to the large current drawn by core, shielding periphery power from core power noise is highly desirable. This paper presents various separation schemes and compares pros and cons. Fundamental power noise coupling mechanisms between core and periphery powers are described in detail. Two major sources of power noise coupling are studied: inductive noise coupling and direct current draw through a common share point. Based on this analysis, we propose cost optimized board decoupling schemes.