AES implementation with TDM multiplexing for Internet routers

Today, security is one of the most important aspects of the Internet. The data encryption/decryption limits the throughput of the Internet routers. In this paper, we propose a novel FPGA design of the most popular encryption algorithm, AES, that achieves high throughput while saving the chip resources by sharing the key expansion module among multiple data encryption modules. The TDM technique is used to enable efficient sharing of the key expansion module.