A novel decoupling capacitor for power integrity application in high-speed 3D-IC package system

In today´s industries, utilizing the SMT capacitor is a mature technology and widely used. But, in the future, the 3D-IC stacking assembly, the SMT capacitor might not suitable for the application in the high-speed and higher frequency range. It is caused by the higher density power assumption in stacked 3D-IC configuration. In this study, we test the PDN performance with two conditions, including a practical surface-mounted capacitor model and a 3D Through-Silicon Interposer (TSI) capacitor model. Generally, a suitable SMT capacitor could be found by simulation tool to improve the impedance of a Power Delivery Network system. However, in this study, we also found out that a TSI capacitor could achieve better performance in higher frequency range.