DocumentCode :
674774
Title :
New cascaded multilevel inverter topology with reduced number of switches and sources
Author :
Hosseini, Seyed Hossein ; Farakhor, Amir ; Haghighian, Saeideh Khadem
Author_Institution :
Fac. of Electr. & Comput. Eng., Univ. of Tabriz, Tabriz, Iran
fYear :
2013
fDate :
28-30 Nov. 2013
Firstpage :
97
Lastpage :
101
Abstract :
This paper presents a novel topology for cascaded multilevel inverters. The proposed topology employs less number of components. This structure consists of a single DC voltage source, several low-frequency transformers and switching devices. There are two switching devices in each module of the proposed structure and there is only a module with three power switches. However, in conventional cascaded H-bridge multilevel inverters four switches are used in each module. The number of gate drivers are reduced respectively along with the switches which results in smaller size, lower cost, lower power consumption in driving circuits and higher efficiency. To verify the performance of the proposed structure, Simulation results carried out by PSCAD/EMTDC and a low-power experimental setup was used to test the converter in practice.
Keywords :
bridge circuits; driver circuits; energy consumption; invertors; switches; switching convertors; transformers; DC voltage source; PSCAD-EMTDC; cascaded H-bridge multilevel inverter topology; driving circuit; gate driver; low-frequency transformer; power consumption; power converter; power switches; switching device; Capacitors; Educational institutions; Industrial electronics; Inverters; Logic gates; Switches; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Electronics Engineering (ELECO), 2013 8th International Conference on
Conference_Location :
Bursa
Print_ISBN :
978-605-01-0504-9
Type :
conf
DOI :
10.1109/ELECO.2013.6713811
Filename :
6713811
Link To Document :
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