Hardware architecture of a unified embedded engineering learning platform

Author

Dukic, Jovan ; Bogic, Stevan ; Dimovski, Dusanka ; Pilipovic, Milos

Author_Institution

Fakultet Tehnickih Nauka, Novi Sad, Serbia

fYear

2013

fDate

26-28 Nov. 2013

Firstpage

537

Lastpage

540

Abstract

This paper presents a hardware architecture of a unified embedded engineering learning platform, based on FPGA. Development platform is designed to perform laboratory exercises related to various interfaces connected to FPGA and peripherals that are found on the platform. This platform is created as universal and can be used for several courses in the area of digital and computer system design. It is possible to access the platform via the Internet, using a server that is located in the laboratory, connected to the platform. Over the mezzanine connector, base board can communicate with additional boards which gives additional possibilities for exercises.

Keywords

Internet; computer aided instruction; computer architecture; computer science education; educational courses; embedded systems; field programmable gate arrays; peripheral interfaces; FPGA; Internet; base board; computer system design courses; digital system design courses; hardware architecture; laboratory exercises; mezzanine connector; peripheral interfaces; unified embedded engineering learning platform; Electronic mail; Field programmable gate arrays; Laboratories; Light emitting diodes; Servers; Universal Serial Bus;

fLanguage

English

Publisher

ieee

Conference_Titel

Telecommunications Forum (TELFOR), 2013 21st

Conference_Location

Belgrade

Print_ISBN

978-1-4799-1419-7

Type

conf

DOI

10.1109/TELFOR.2013.6716285

Filename

6716285