Title :
60 GHz On-chip loop antenna integrated in a 0.18 µm CMOS technology
Author :
Yao, Yiying ; Hirano, Takuichi ; Okada, Kenichi ; Hirokawa, Jiro ; Ando, Makoto
Author_Institution :
Dept. of Electr. & Electron. Eng., Tokyo Inst. of Technol., Tokyo, Japan
Abstract :
This paper describes the electromagnetic (EM) field analysis of a 60 GHz on-chip loop antenna integrated in a 0.18 μm CMOS Technology. The simulation was compared with the measurement. The reflection coefficient showed good agreement between simulation and measurement by assuming a conductive layer of about 1 μm in the simulation. The radiation efficiency is calculated and it was found that the radiation efficiency can be improved by reducing conductivity of the silicon substrate. The radiation efficiency of 82.6% can be achieved if conductivity is less than 0.1 S/m.
Keywords :
CMOS integrated circuits; antenna radiation patterns; electromagnetic fields; loop antennas; millimetre wave integrated circuits; CMOS technology; EM field analysis; conductive layer; conductivity reduction; efficiency 82.6 percent; electromagnetic field analysis; frequency 60 GHz; on-chip loop antenna; radiation efficiency; reflection coefficient; silicon substrate; size 0.18 mum; Antennas; CMOS integrated circuits; Conductivity; Semiconductor device modeling; Silicon; Substrates; System-on-chip; CMOS substrate; Conductive layer; Electromagnetic simulation; Millimeter-wave; On-chip loop antenna;
Conference_Titel :
Antennas & Propagation (ISAP), 2013 Proceedings of the International Symposium on
Conference_Location :
Nanjing
Print_ISBN :
978-7-5641-4279-7
