• DocumentCode
    676319
  • Title

    Reconfigurable chip advantage compared with GPGPU from the compiler perspective

  • Author

    Wakabayashi, Kazutoshi

  • fYear
    2013
  • fDate
    9-11 Dec. 2013
  • Firstpage
    2
  • Lastpage
    2
  • Abstract
    This presentation discusses how FPGA or coarse grained reconfigurable processor is superior to CPU/GPGPU from the view point of C compiler. Initially, we introduce the architectural characteristic of CPU, GPGPU and fine grained and coarse grained reconfigurable process with FSM+Datapath model. Then, we explain what kind of applications can be accelerated with "FPGA and C-based High Level Synthesis Tool" better than GPGPU according to the compiler techniques (freedom of compiler parallelization).
  • Keywords
    C language; field programmable gate arrays; finite state machines; graphics processing units; high level synthesis; program compilers; reconfigurable architectures; C compiler technique; C-based high level synthesis tool; CPU; FPGA; FSM+Datapath model; GPGPU; architectural characteristic; coarse grained reconfigurable process; fine grained reconfigurable process; reconfigurable chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Technology (FPT), 2013 International Conference on
  • Conference_Location
    Kyoto
  • Print_ISBN
    978-1-4799-2199-7
  • Type

    conf

  • DOI
    10.1109/FPT.2013.6718319
  • Filename
    6718319