DocumentCode
6764
Title
Functional Broadside Templates for Low-Power Test Generation
Author
Pomeranz, Irith
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Volume
21
Issue
12
fYear
2013
fDate
Dec. 2013
Firstpage
2321
Lastpage
2325
Abstract
This brief describes a new approach to low-power test generation targeting the maximum switching activity during the fast functional clock cycles of broadside tests. This brief defines functional broadside templates as incompletely-specified broadside tests, which capture the signal-transitions that occur during the fast functional clock cycles of functional broadside tests. The same signal-transitions can occur during functional operation. Therefore, functional broadside templates can guide the generation of low-power test sets when the goal is to match the power dissipation that is possible during functional operation on a line-by-line basis. This brief describes a procedure for computing functional broadside templates from completely-specified functional broadside tests, and a low-power test generation procedure for transition faults based on templates.
Keywords
circuit testing; clocks; fault tolerance; low-power electronics; fast functional clock cycles; functional broadside templates; low-power test generation; maximum switching activity; signal-transitions; transition faults; Benchmark testing; Circuit faults; Clocks; Computational modeling; Power dissipation; Switches; Very large scale integration; Functional broadside tests; low-power tests; scan circuits; test generation; transition faults;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2012.2228510
Filename
6409490
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