Title :
Symbolic fault modeling for switched-capacitor circuits
Author :
Jiandong Cheng ; Guoyong Shi ; Tai, Andy ; Lee, Fred
Author_Institution :
Sch. of Microelectron., Shanghai Jiao Tong Univ., Shanghai, China
Abstract :
A symbolic construction method allowing for parameter limit operation is proposed. Switched-capacitor circuits can be analyzed with this method by creating a symbolic z-domain transfer function represented in the form of a Binary Decision Diagram (BDD). Manipulating the symbols in BDD can simulate a variety of circuit faults, such as switch faults, capacitor faults, and opamp gain faults. Implementation methods are presented and illustration examples are provided.
Keywords :
binary decision diagrams; operational amplifiers; switched capacitor networks; transfer functions; BDD; binary decision diagram; capacitor faults; circuit faults; opamp gain faults; parameter limit operation; switch faults; switched capacitor circuits; symbolic construction; symbolic fault modeling; symbolic z-domain transfer function; Boolean functions; Data structures; Educational institutions; Microelectronics; Switches; Binary decision diagram (BDD); fault simulation; switched-capacitor circuit; symbolic analysis;
Conference_Titel :
TENCON 2013 - 2013 IEEE Region 10 Conference (31194)
Conference_Location :
Xi´an
Print_ISBN :
978-1-4799-2825-5
DOI :
10.1109/TENCON.2013.6719067
