• DocumentCode
    67744
  • Title

    Factored Forms for Memristive Material Implication Stateful Logic

  • Author

    Marranghello, Felipe S. ; Callegaro, Vinicius ; Martins, Mayler G. A. ; Reis, Andre I. ; Ribas, Renato P.

  • Author_Institution
    Inst. of Inf., Fed. Univ. of Rio Grande do Sul, Porto Alegre, Brazil
  • Volume
    5
  • Issue
    2
  • fYear
    2015
  • fDate
    Jun-15
  • Firstpage
    267
  • Lastpage
    278
  • Abstract
    This paper proposes the utilization of factored forms in logic synthesis for memristive material implication stateful logic. Factored forms have not been explored by previous works due to expected increasing on device count. We present an algorithm to obtain factored forms computable with minimum number of memristors. Comparison to previous works shows an average reduction of 12% in the number of operations to compute 4-input Boolean functions.
  • Keywords
    Boolean functions; logic circuits; logic design; memristor circuits; 4-input Boolean functions; digital circuit; factored form utilization; logic synthesis; memristive material implication stateful logic; memristors; Boolean functions; Circuits and systems; Computer architecture; Input variables; Memristors; Performance evaluation; Resistance; Digital circuit; implication logic; logic synthesis; memristor; stateful logic;
  • fLanguage
    English
  • Journal_Title
    Emerging and Selected Topics in Circuits and Systems, IEEE Journal on
  • Publisher
    ieee
  • ISSN
    2156-3357
  • Type

    jour

  • DOI
    10.1109/JETCAS.2015.2426511
  • Filename
    7109188