Effect of spacers on Si tunneling field effect transistor with P-N-I-N structure

This paper presents an improved novel TFET device architecture which exploits electric field modulation by introducing low-k spacers combined with source/drain electrode contact placed at top and bottom side of the designed device. Numerical simulation of the optimized device architecture shows high on current, reduced subthreshold swing and good ambipolar behaviour. The structure under investigation shows 5 times increase in on current level compared to the other structure which do not use spacers.