DocumentCode
678515
Title
Security and design of a cryptoprocessor for pairings over BN curves on FPGA platform
Author
Joy, Santhi Maria ; Kumar, V. M. Senthil
fYear
2013
fDate
4-6 July 2013
Firstpage
1
Lastpage
5
Abstract
This paper provides a new design methodology to improve the efficiency of a parallel dual core cryptoprocessor for computing pairings over Barreto Naehrig (BN) curves. The proposed design is specifically optimized for Field Programmable Gate Array Platforms(FPGA). We explore the inbuilt features of an FPGA device to improve the efficiency of a cryptoprocessor for computing 128-bit secure pairings.
Keywords
cryptography; field programmable gate arrays; microprocessor chips; 128-bit secure pairings; BN curves; Barreto Naehrig curves; FPGA; computing pairings; design methodology; field programmable gate array platforms; parallel dual core cryptoprocessor; Adders; Algorithm design and analysis; Computer architecture; Elliptic curve cryptography; Field programmable gate arrays; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Computing, Communications and Networking Technologies (ICCCNT),2013 Fourth International Conference on
Conference_Location
Tiruchengode
Print_ISBN
978-1-4799-3925-1
Type
conf
DOI
10.1109/ICCCNT.2013.6726603
Filename
6726603
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