DocumentCode :
678549
Title :
Hardware software co-simulation of dual image encryption using Latin square image
Author :
Kumar, S. K. Naveen ; Kumar, H. S. Sharath ; Panduranga, H.T.
Author_Institution :
Dept. Of Electron., Univ. of Mysore, Hassan, India
fYear :
2013
fDate :
4-6 July 2013
Firstpage :
1
Lastpage :
5
Abstract :
Hardware Software co-simulation of a multiple image encryption technique has been described in the present study. Proposed multiple image encryption technique is based on Latin Square Image Cipher (LSIC). First, a carrier image based on Latin Square is generated by using 256 bits length key. XOR operation is applied between an input image and Latin Square Image to generate an encrypted image. Then XOR operation is applied between encrypted image and second input image to encrypt second image. This process is continues till nth input image. The proposed multiple image encryption technique is implemented Xilinx System Generator (XSG). This encryption technique is modeled using Simulink and XSG Block set and synthesized onto Virtex 2 pro FPGA device. Proposed technique is validated using hardware software co-simulation method.
Keywords :
cryptography; digital simulation; field programmable gate arrays; image processing; LSIC; Latin square image cipher; Simulink; Virtex 2 pro FPGA device; XOR operation; XSG block set; Xilinx System Generator; dual image encryption technique; encrypted image generate; hardware software cosimulation method; word length 256 bit; Encryption; Field programmable gate arrays; Generators; Hardware; PSNR; Software; Dual Image Encryption; Latin Square Image; Xilinx System Generator;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computing, Communications and Networking Technologies (ICCCNT),2013 Fourth International Conference on
Conference_Location :
Tiruchengode
Print_ISBN :
978-1-4799-3925-1
Type :
conf
DOI :
10.1109/ICCCNT.2013.6726681
Filename :
6726681
Link To Document :
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