Filtering Insertions into a Small Instruction Cache in Embedded Processors

In this paper, we propose and discuss a novel technique which can filter cache insertions to avoid ´slashing´ on small size caches. The proposed filter technique add control bits to each cache block which is based on the number of references on each memory block which can be obtained by preliminary execution. When the miss handling, exploiting the control bits, busy-status of cache sets can be detected. Using this mechanism, the proposed mechanism can dynamically detect whether or not the cache set is busy, and can obstruct inserting memory blocks to busy cache set. By this effect, the proposed mechanism can make it possible to alleviate drastic performance degradation by executing large program binary in small size caches.