DocumentCode :
678712
Title :
TinyCSE: Tiny Computer System for Education
Author :
Nakamura, Ryosuke ; Ito, Yu ; Nakano, Kaoru
Author_Institution :
Dept. of Inf. Eng., Hiroshima Univ., Higashi Hiroshima, Japan
fYear :
2013
fDate :
4-6 Dec. 2013
Firstpage :
639
Lastpage :
641
Abstract :
TinyCPU is a small processor that can be implemented in various FPGAs that can be used for education and development of small embedded system. TinyCPU is so small that it is designed using Verilog HDL and the size of source code is only 427 lines. However, it does not support interrupts and peripheral controllers. The main contribution of this paper is to present TinyCSE (Tiny Computer System for Education), an extension of TinyCPU supporting interrupts and peripheral controllers. TinyCSE has controllers for external devices including keyboard, mouse, serial communication, switch, and timer. It also supports hardware interrupts from these external devices. Quite surprisingly, the code sizes of the CPU with interrupt controller and the device controllers are 515 lines and is 1339 lines in Verilog HDL, respectively. Our processor is portable and easy to understand and the function expansion is not difficult. As real-life applications, we have developed a time watch. This applications runs in 73MHz on the Xilinx Spartan-3AN family FPGA XC3S700AN using 832 out of 5888 slices (14.1%). Therefore, our tiny processing system benefits computer system education and small embedded system development.
Keywords :
computer science education; embedded systems; field programmable gate arrays; hardware description languages; microprocessor chips; peripheral interfaces; FPGA XC3S700AN; TinyCPU; TinyCSE; Verilog HDL; Xilinx Spartan-3AN family; computer system education; device controllers; hardware interrupts; interrupt controller; keyboard; mouse; peripheral controllers; processor; serial communication; small embedded system development; source code size; switch; time watch; timer; tiny computer system for education; tiny processing system; Computer architecture; Education; Field programmable gate arrays; Hardware; Hardware design languages; Process control; Switches; CPU; Computer system; Education; Embedded system; Interrupt; Verilog HDL;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computing and Networking (CANDAR), 2013 First International Symposium on
Conference_Location :
Matsuyama
Print_ISBN :
978-1-4799-2795-1
Type :
conf
DOI :
10.1109/CANDAR.2013.117
Filename :
6726979
Link To Document :
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