DocumentCode
678766
Title
High throughput asynchronous NoC switch for high process variation
Author
Ezz-Eldin, Rabab ; El-Moursy, Magdy A. ; Hamed, Hesham F. A.
Author_Institution
Electron. Eng. Dept., Bani-suef Univ., Bani-suef, Egypt
fYear
2013
fDate
16-18 Dec. 2013
Firstpage
1
Lastpage
4
Abstract
Asynchronous NoC switch is proposed as a robust design to mitigate the impact of process variation. Circuit analysis is used to evaluate the influence of process variation on both synchronous and asynchronous designs. The delay and throughput variation are evaluated with different technologies. Although the asynchronous switch has large delay variation as compared to synchronous switch, high throughput is achieved under high process variation conditions. The throughput remains unchanged under high process variation conditions in asynchronous NoC switch, while the throughput of synchronous switch is rapidly reduced at the same conditions.
Keywords
integrated circuit design; network analysis; network-on-chip; asynchronous designs; circuit analysis; delay variation; high process variation conditions; high throughput asynchronous NoC switch; network on chip; synchronous designs; throughput variation; Delays; Ports (Computers); Protocols; Routing; Switches; Synchronization; Throughput; Asynchronous design; Network on Chip; Process Variation; Synchronous design;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Test Symposium (IDT), 2013 8th International
Conference_Location
Marrakesh
Type
conf
DOI
10.1109/IDT.2013.6727079
Filename
6727079
Link To Document