Eliminating tie-down diodes in process technologies

In deep sub-micron process technologies tie-down diodes are used to prevent damage to the oxide layer due to charge build-up during fabrication. Tie-downs are reverse biased diodes to the substrate and are required for FET gates, PFET wells, bond-pads and MIM capacitor top and bottom plates. In normal operating conditions, these diodes must be kept in reverse biased condition. However, large bipolar signals may bias these protection diodes in forward direction resulting in considerable signal/power loss. This paper presents a novel way of eliminating the need of individual tie-down diodes especially at the output node, where bipolar signals may be present, such as in amplifier circuits. EM simulation results indicate that this technique does not degrade the overall circuit performance.