DocumentCode
680069
Title
A fault attack on a hardware-based implementation of the secure hash algorithm SHA-512
Author
Shoufan, Abdulhadi
Author_Institution
Technol. & Res., Khalifa Univ. of Sci., Abu-Dhabi, United Arab Emirates
fYear
2013
fDate
9-11 Dec. 2013
Firstpage
1
Lastpage
7
Abstract
Cryptographic hash functions are frequently used as basic components in cryptographic schemes such as message authentication codes, one-time signature schemes, and random number generators. In such applications the input to the hash function is a secret key or secret data. An investigation of the hash function against implementation attacks in such cases is indispensable. This paper presents a fault attack on the secure hash algorithm using the example of SHA-512. A fault model is proposed that relies on flipping two control bits to reduce the round number of the SHA-512 algorithm. By means of this attack the first data block can be extracted completely. The attack was applied to a keyed-hash message authentication code to reveal its secret key. A countermeasure is proposed to detect and prevent the attack. The attack and the countermeasure were evaluated for an FPGA implementation.
Keywords
cryptography; field programmable gate arrays; message authentication; performance evaluation; FPGA implementation; SHA-512 algorithm; control bits; cryptographic hash functions; cryptographic schemes; fault attack; fault model; hardware-based implementation; implementation attacks; keyed-hash message authentication code; message authentication codes; one-time signature schemes; random number generators; round number; secret data; secret key; secure hash algorithm; Circuit faults; Cryptography; Hardware; Message authentication; Registers; Tablet computers; Trojan horses;
fLanguage
English
Publisher
ieee
Conference_Titel
Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on
Conference_Location
Cancun
Print_ISBN
978-1-4799-2078-5
Type
conf
DOI
10.1109/ReConFig.2013.6732292
Filename
6732292
Link To Document