DocumentCode :
680091
Title :
The Hamiltonian-based odd-even turn model for adaptive routing in interconnection networks
Author :
Bahrebar, Poona ; Stroobandt, Dirk
Author_Institution :
Dept. of Electron. & Inf. Syst. (ELIS), Ghent Univ., Ghent, Belgium
fYear :
2013
fDate :
9-11 Dec. 2013
Firstpage :
1
Lastpage :
6
Abstract :
Optimization of multiprocessor systems relies heavily on the efficient design of on-chip routing algorithms. Adaptive routing appears to have an extremely significant role in the performance of the Networks-on-Chip. In this paper, a deadlock-free and highly adaptive minimal routing method (HOE) is proposed. Although the Hamiltonian Adaptive Multicast Unicast Model (HAMUM) is able to support a high degree of adaptiveness, it cannot exploit some of the potential alternative paths in routing. By prohibiting the minimum number of turns, our proposed method strives to find the maximum number of alternative paths between each pair of source and destination nodes, without using virtual channels. HOE has also been applied to the Column-Path (CP) routing algorithm to improve its characteristics. The simulation results validate the flexibility of our approach in choosing the appropriate routing path depending on the congestion condition of the network. The better performance of the proposed method is due to its higher degree of adaptiveness which results in less vulnerability to nonuniform factors and a better traffic distribution all over the network.
Keywords :
multiprocessing systems; network-on-chip; CP routing algorithm; HAMUM; Hamiltonian adaptive multicast unicast model; Hamiltonian based odd even turn model; Networks-on-Chip; adaptive minimal routing method; adaptive routing; column path; interconnection networks; multiprocessor system optimisation; onchip routing algorithms; traffic distribution; Adaptation models; Adaptive systems; Algorithm design and analysis; Routing; System recovery; System-on-chip; Unicast; Column-Path (CP) routing algorithm; Hamiltonian path-based routing method; Networks-on-Chip (NoC); adaptive routing; deadlock; turn model;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on
Conference_Location :
Cancun
Print_ISBN :
978-1-4799-2078-5
Type :
conf
DOI :
10.1109/ReConFig.2013.6732332
Filename :
6732332
Link To Document :
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