DocumentCode :
680466
Title :
A 0.1dB NF, 2GHz low power CMOS low noise amplifier
Author :
Pandey, S.K. ; Agrawal, Sanjay ; Singh, Jaskirat ; Parihar, Manoj Singh
Author_Institution :
ECE Dept., PDPM-IIITDM, Jabalpur, India
fYear :
2013
fDate :
16-18 Dec. 2013
Firstpage :
1
Lastpage :
4
Abstract :
Short range applications find significant usage in different areas such as industrial process automation and environmental monitoring. Power consumption and noise figure are important constraint for short range application as it carries limited and irreplaceable power sources. This paper describes a CMOS low noise amplifier (LNA) suitable for low voltage short range application. The reported LNA exhibits the best noise performance when compared with existing circuits. The proposed LNA operates at 2 GHz with noise figure (NF) of 0.1 dB, input and output reflection coefficients are S11, S22 <;-10 dB, power gain S21=16 dB and power dissipation of approximately 8 mW from 0.8 V power supply. A standard 90 nm PTM CMOS process is used for simulation.
Keywords :
CMOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; integrated circuit design; low noise amplifiers; low-power electronics; LNA; environmental monitoring; frequency 2 GHz; gain 16 dB; industrial process automation; low power CMOS low noise amplifier; low voltage short range application; noise figure 1 dB; power consumption; power dissipation; size 90 nm; standard PTM CMOS process; voltage 0.8 V; CMOS integrated circuits; CMOS technology; Gain; Impedance matching; Noise; Noise measurement; Power dissipation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Control, Automation, Robotics and Embedded Systems (CARE), 2013 International Conference on
Conference_Location :
Jabalpur
Type :
conf
DOI :
10.1109/CARE.2013.6733704
Filename :
6733704
Link To Document :
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