Factors influencing the formation of voids in chip component solder joints

The aim of this paper is to present the most recent results obtained after conducting a complex experiment designed with the help of the Design of Experiments (DoE) method. The purpose of this experiment is to evaluate the dependencies between the layout design and the production quality of surface mount boards. The last part of this experiment is focused on studying the effects of solder voids on the reliability of solder joints. Solder joints are investigated and evaluated with the help of an X-Ray equipment. Based on the X-Ray images, the void area in a solder joint is measured (in pixels). The statistical analysis has revealed that all factors considered to have an influence on the void formation in this experiment are significant. Moreover all the interactions between these factors are statistically significant. The largest void content is obtained in case of microMELF components, chemSn surface finish and solder paste type C. As opposed to our expectations, the void area is the smallest in case of Vapour Phase Soldering.