Title :
A negative-correlation redundancy design model for automated synthesis of analog circuits
Author :
Chao Lin ; Jingsong He
Author_Institution :
Dept. of Electron. Sci. & Technol., Univ. of Sci. & Technol. of China, Hefei, China
Abstract :
The negative-correlation redundancy approach is a novel way for fault-tolerant design of analog circuits under uncertain faults. One of its key factors is the design of negative-correlation redundancy evolutionary model. In this paper, we propose a novel negative-correlation redundancy evolutionary design model. In order to improve the scalability of this model, DE_SR algorithm is proposed. Experimental results on analog low-pass filters show clearly that this novel model is effective and feasible. Compared with the existing negative-correlation redundancy evolutionary model named ENCF, our model has a lower computational complexity and higher search efficiency, and it have better on large-scale problems of circuit synthesis.
Keywords :
analogue circuits; circuit CAD; computational complexity; evolutionary computation; fault tolerance; low-pass filters; DE_SR algorithm; ENCF; analog circuits; analog low-pass filters; automated synthesis; circuit synthesis; computational complexity; fault tolerant design; negative-correlation redundancy evolutionary design model; search efficiency; Chaos; Circuit faults; Computational modeling; Convergence; Handheld computers; Redundancy; Robustness;
Conference_Titel :
Advanced Computational Intelligence (ICACI), 2013 Sixth International Conference on
Conference_Location :
Hangzhou
Print_ISBN :
978-1-4673-6341-9
DOI :
10.1109/ICACI.2013.6748505