DocumentCode
685406
Title
A 0.65μW baseband processor for UHF RFID with on-chip antenna
Author
Yan Cui ; Chun Zhang ; Dingguo Wei ; Xijin Zhao ; Hanjun Jiang
Author_Institution
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Volume
1
fYear
2013
fDate
15-17 Nov. 2013
Firstpage
367
Lastpage
370
Abstract
A low-cost low-power baseband processor for passive UHF RFID tag based on self-defined protocol is presented in this work. In order to be driven by the on-chip antenna, baseband processor employs various methods of low power technology, including GSLA (Globally Synchronous Locally Asynchronous) concept, multiple working voltages, scaling frequency of some modules, clock-gating, reuse of registers, etc. Both the average and peak power have got the optimal value. Simulation results indicate that the processor consumes less than 0.65 μW at 1 V supply voltage and the minimum area is 0.0375 mm2. The whole tag including on-chip antenna (OCA), RF frontend, low-power baseband processor and an OTP of 256 bits is designed and fabricated successfully using a 0.18 μm process. In measurement, the tag has proper functions in both testing and normal modes and the reading distance can reach 1 mm.
Keywords
CMOS integrated circuits; UHF antennas; low-power electronics; protocols; radiofrequency identification; GSLA concept; OCA; OTP; RF frontend; clock-gating; distance 1 mm; globally synchronous locally asynchronous concept; low-cost low-power baseband processor; on-chip antenna; passive UHF RFID tag; power 0.65 muW; scaling frequency; self-defined protocol; size 0.1 mum; storage capacity 256 bit; voltage 1 V; Baseband; Clocks; Decoding; Power demand; Probes; Radiofrequency identification; System-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems (ICCCAS), 2013 International Conference on
Conference_Location
Chengdu
Print_ISBN
978-1-4799-3050-0
Type
conf
DOI
10.1109/ICCCAS.2013.6765254
Filename
6765254
Link To Document