Design and implementation of AMBA ASB APB bridge

Author

Manu, B.N. ; Prabhavathi, P.

Author_Institution

Dept. of Electron. & Commun., BNM Inst. of Technol., Bangalore, India

fYear

2013

fDate

6-8 Dec. 2013

Firstpage

234

Lastpage

238

Abstract

The 32 bit AMBA ASB APB Bridge provides an interface between the Advanced System Bus (ASB) and the Advanced Peripheral Bus (APB). It inserts wait states for burst of read or write transfers when the ASB must wait for the APB. The bridge is designed to respond to transaction requests from the currently enabled ASB master. The ASB transactions are converted into APB transactions. APB peripherals do not need a clock input as the APB access is timed with a strobe signal generated by the ASB to APB bridge interface. The AMBA ASB APB Bridge is modeled using Verilog HDL and validated on SPARTAN 3E and results are visualized on ChipScope Pro.

Keywords

hardware description languages; peripheral interfaces; system buses; 32 bit AMBA ASB APB bridge; APB peripherals; APB transactions; ASB master; ChipScope Pro; SPARTAN 3E; Verilog HDL; advanced peripheral bus; advanced system bus; read-write transfers; strobe signal; Bridges; Computer architecture; Decoding; Educational institutions; Microprocessors; Program processors; System-on-chip; AMBA; APB; ASB; SoC; Verilog;

fLanguage

English

Publisher

ieee

Conference_Titel

Fuzzy Theory and Its Applications (iFUZZY), 2013 International Conference on

Conference_Location

Taipei

Type

conf

DOI

10.1109/iFuzzy.2013.6825442

Filename

6825442